A metal wiring formed by using photoresist (hereinafter referred to as “PR”) and electroplating has limitation in forming a thick metal wiring having a high aspect ratio characteristic due to the limitation in the maximum thickness and the aspect ratio of the PR.
Furthermore, in a semiconductor device, there is a problem that the overall thickness of the module is increasing due to the thickness increase in the structure formed on the substrate surface.
Recently, an inductor structure, having a through silicon via (TSV), has been suggested in order to form a thick metal signal line.
However, in this case, there is a difficulty in the process wherein the via must be fully filled with metal; moreover, the high dielectric constant existing between the signal lines and the lossy characteristic of the silicon relatively degrade the performance of the inductor.
Especially, the densely integrated thin film inductors for a semiconductor device are being manufactured with the thickness less than 10 μm, and designed with a limited line width due to the limitation in the area thereof. Therefore, there is a limitation in implementing a high quality characteristic of an inductor for a semiconductor device due to the thin metal thickness and limitation in the line width of the wiring.